How to Calculate Quantum Circuit Error Budget
Quantum hardware procurement teams, algorithm developers, and compliance officers all need a single number to communicate the reliability of a compiled circuit: the circuit success probability. Arriving at that number requires translating benchmarking data—gate error rates in parts per million (ppm), measurement infidelity, and shot counts—into an error budget. This walkthrough shows how to structure that translation so it aligns with scheduling models used in the latency budgeting guide and infrastructure capacity planning frameworks such as the GPU memory headroom tutorial.
With a defensible error budget, you can decide whether to invest in error mitigation, recompile the circuit, or wait for a next-generation processor. The method below is hardware-agnostic; it works with superconducting, trapped-ion, neutral atom, or photonic systems so long as error rates are provided per operation.
Definition and reporting scope
A quantum circuit error budget consolidates the independent error probabilities associated with each gate and measurement into a single success probability. The output is usually reported as a percentage indicating the probability that all operations execute without error. Some organisations also track the expected number of error events (in decimal units) to estimate the benefit of error mitigation strategies or to plan repetition counts when running on noisy hardware.
This guide focuses on non-fault-tolerant circuits where gate errors are assumed to be independent and identically distributed. If you are implementing active error correction, additional terms—syndrome extraction fidelity, logical cycle time, decoder latency—enter the budget. Treat those as extensions to the framework described here.
Variables and units
Capture every variable in consistent units so QA and procurement can audit the inputs:
- N1 – Count of single-qubit gates applied in the compiled circuit (dimensionless).
- ε1 – Average single-qubit error rate per gate (ppm, convert to probability by dividing by 106).
- N2 – Count of two-qubit gates (dimensionless).
- ε2 – Average two-qubit error rate per gate (ppm).
- Nm – Number of measurement operations, including mid-circuit reads (dimensionless).
- εm – Measurement error per readout (ppm).
- Psucc – Circuit success probability (dimensionless share, 0–1).
- E – Expected number of error events across the circuit.
Using ppm keeps the metrics aligned with gate benchmarking outputs such as randomized benchmarking (RB) or cross-entropy benchmarking (XEB). If your hardware vendor supplies error rates in percent, multiply by 10,000 to convert to ppm before inserting them into the formulas. Store the source of each rate (date of calibration, hardware configuration) alongside the calculation so procurement teams can assess staleness.
Core formulas
Assuming independent Bernoulli error events, the following relationships hold:
Psucc = (1 − ε1)N1 × (1 − ε2)N2 × (1 − εm)Nm
Overall failure probability = 1 − Psucc
Expected error events E = N1ε1 + N2ε2 + Nmεm
These formulas treat each operation as independent. While cross-talk can invalidate that assumption, the framework still works as a first-order approximation. You can append covariance terms later if benchmarking reveals systematic correlations—for example, simultaneous gate operations in a heavy-hex architecture.
Step-by-step workflow
1. Compile gate counts
Export the compiled circuit from your quantum SDK (Qiskit, Cirq, Braket, QIR) after any transpilation passes. Count single- and two-qubit gates separately. Document the transpilation level and target topology because gate counts shift depending on routing strategies. If dynamic circuit features exist, track expected counts per shot or branch.
2. Pull calibrated error rates
Source ε1, ε2, and εm from the latest device calibration report. Convert percentages to ppm and note the calibration timestamp. If your procurement team negotiates service-level agreements on error rates, store the contractual maximums alongside the measured values to monitor compliance.
3. Estimate measurement counts
Count terminal measurements plus any mid-circuit resets that rely on readout. When dynamic circuits branch, compute an expectation value over the branch probabilities. This ensures the error budget stays representative of average execution rather than best-case paths.
4. Compute success and failure probabilities
Translate ppm to probabilities by dividing by 106, then plug values into the formulas. Report both Psucc and the complementary failure probability. Finance partners often work with the latter when forecasting repetition counts needed to meet quality of service targets.
5. Document expected error events
Calculate E and store it with the success probability. E becomes particularly important when you employ error mitigation techniques such as zero-noise extrapolation: it indicates the baseline error burden the mitigation strategy must counteract. Link this record to runtime telemetry so you can verify whether observed success rates match predictions.
Validation and monitoring
Validate the budget by running calibration circuits and comparing observed success to the predicted Psucc. When discrepancies exceed control limits, recalibrate or update error models. Maintain a dashboard that trends error rates, counts, and resulting Psucc over time; highlight deviations when hardware maintenance occurs or when the provider swaps qubits in the active set.
Integrate the budget with workload schedulers. For example, couple it with the latency budgeting workflow to decide whether additional repetitions fit within service windows. Storing every calculation builds an audit trail for compliance reviews and customer communications.
Limits and interpretation
Independent error assumptions break down when your circuit intentionally executes parallel gates on qubits connected by couplers with known cross-talk. In those cases, add correlation coefficients or run noise-aware simulations to calibrate correction factors. Likewise, non-Markovian noise (drift over time) requires slicing long circuits into segments and refreshing error rates periodically.
Remember that the success probability describes a single execution. Production workloads often run thousands of shots; even a seemingly high Psucc can translate into significant re-run cost. Combine this metric with cost-per-shot analyses and GPU post-processing budgets to make holistic go/no-go decisions.
Embed: quantum circuit error budget calculator
Enter gate counts, ppm error rates, and measurement assumptions to compute circuit success probability, expected error events, and failure probability instantly.